Course name: Verification for Low power design

Code: VLPD

Training content

• Low power design introduction – 1 lecture
• Impact of LPD on Digital design – 1 lecture
• Power management bugs – 3 lectures
• VMM-LP Class Library – 2 lectures

Training purpose

• Students can understand the important steps in the process of verifying low-power chip designs.

References

• Verification Methodology Manual for Low Power