Course name: Computer Architect

Code: CA

Training content

• Introduction – 1 lectures
• Instruction Set Architecture (ISA) – 2 lectures
• RISC vs CISC – 1 lecture
• Operating System Functions – 2 lectures
• Basic Structural Organization of a Processor. Instruction Pipelining – 4 lectures
• Arithmetic Logic Units (ALU) – 2 lectures
• Memory Organization – 3 lectures
• Parallel Processing. Contemporary Processors – 4 lectures
• Input/Output Organization – 2 lectures
• Assembly Language – 2 lectures
• Introduction to Application Instruction Set Processor – 4 lectures

Training purpose

• Students understand the architecture of basic Chip lines with CPU and peripherals. Understand programming and preliminary design methods.

References

• Computer Architecture: A Quantitative Approach, Fifth Edition