Trainer
Dr. Le Thai Ha
Students
30
Duration
4 months
Certificate
Yes
Lectures
8 hours
Labs & HW
16 hours
Course name: HDL Language
Code: HDL
Training content
- Introduction to Verilog. Basic concepts, syntax. Data types, parameter types – 1 lecture
- Verilog operators. Assignment types. Verilog block types – 1 lecture
- Verilog blocks. Combinational and sequential logic. Module instantiation – 1 lecture
- Verilog gate-level modeling. Testbench. Timescale, delays. Assignment – 1 lecture
- Blocking & non-blocking assignments. Verilog control flow. Case statement – 1 lectures
- Verilog tasks & functions – 1 lecture
- Verilog compiler directives. Delay control. Verilog block statements. Generate – 1 lecture
- Verilog reference scope. System tasks. File I/O operations – 1 lecture
Training purpose
- Provides basic to advanced HDL programming skills. Students can program, simulate and evaluate Chip blocks and modules themselves.
References
- Digital Integrated Circuits: A Design Perspective
- Introduction to Logic Circuits & Logic Design with Verilog
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